SPI includes four operation modes of the bus. SPI can complete data interaction with other devices. According to the functional requirements of the system, the program can effectively control the polarity and phase of the output serial synchronous clock. The transmission protocol of the system will not be greatly affected by the polarity mark (cpol) of the clock. The flag of the serial synchronous clock is consistent with the state of cpol, that is, when cpol is 0, the idle flag of the synchronous clock is 0, and so is when cpol is 1. Clock phase (CPHA) realizes the selection of transmission protocol and data transmission. If CPHA is 0, the data will be transmitted when the first level of the serial synchronous clock changes (rising edge or falling edge); if CPHA is 1, the data will be transmitted when the second level of the serial synchronous clock changes (rising edge or falling edge).