8.3.9 Other Contamination When surface organic contamination testing is required, assemblies tested in accordance with IPC-TM-650, Test Method 2.3.39, Surface Organic Contamination Identification Test (Infrared Analytical Method) shall not (D1 D2 D3)exceed the maximum acceptance level established by mutual agreement between user and manufacturer.9 ASSEMBLY REQUIREMENTS9.1 Acceptance Requirements All soldered connections shall (1 2 3) meet the applicable product class acceptance requirements of9.2. All products shall (D1, D2, D3) meet the requirements of the assembly drawing(s)/documentation and the requirements for theapplicable product class specified herein.Manufacturers shall (1 2 3) perform 100% inspection unless sampling inspection is defined as part of a documented process controlplan in accordance with 11.3. Manufacturers shall (NoRqtEstablished1, D2, D3) perform 100% inspection unless sampling inspectionis defined as part of a documented process control plan.9.1.1 Corrective Action LimitsThe goal of corrective action is to eliminate all variances from the requirements of this standard (where economically practical).When using a process control system:a. corrective action limits shall (D1, D2, D3) be defined (see 1.5). If process control limits have not been established, corrective actionshall (NoRqtEst.1, D2, D3) be initiated if defects exceed 0.3% of the opportunities for their occurrence (9.1.2).b. if defects or process indicators exceed the corrective action limits specified for their respective level of opportunities (9.1.2), themanufacturer shall (D1, D2, D3) initiate corrective action to reduce their occurrence.For corrective action calculations, no more than one defect characteristic or process indicator can be attributed to a particularinterconnection site (e.g., via, lead-in-hole, lead-to-land).For Class 3:a. Corrective action shall (NoRqtEstablished1 NoRqtEstablished2 D3) be initiated if defects exceed the control limits established inaccordance with the documented process control plan (see 11.3c).b. If process control limits have not been established, corrective action shall (NoRqtEstablished1 NoRqtEstablished2 D3) be initiatedif defects exceed 0.3% of the opportunities for their occurrence (see 9.1.2).When a decision or requirement is to use a documented process control system, failure to implement process corrective action and/orthe use of continually ineffective corrective actions shall (NoRqtEstablished1 D2 D3) be grounds for disapproval of the process andassociated documentation.9.1.2 Opportunities Determination Unless otherwise specified in the process control plan, the total number of interconnection sitesis used as the measure to which the percentage of defects or process indicators is applied. These calculations consider each surfacemount termination, each through-hole termination, and each terminal termination as a single opportunity in determining the totalnumber of opportunities for a given printed board assembly. For more information see IPC-9261.9.2 General Assembly Requirements All products shall (D1 D2 D3) meet the requirements of the assemblydrawing(s)/documentation. The electrical and mechanical integrity and the reliability of all components and assemblies shall(D1 D2 D3) be retained after exposure to all processes employed during manufacture and assembly (e.g., handling, baking, fluxing,soldering, and cleaning).9.2.1 Printed Circuit Assembly Damage9.2.1.1 Printed Circuit Board Damage The following printed circuit board defects shall (D1 D2 D3) be rejected:a. Blistering or delamination(s) that exceed 25% of the distance between plated-through holes or internal conductors for Class 1printed circuit boards or assemblies.b. Any evidence of blistering or delamination between plated-through holes or internal conductors for Class 2 or Class 3 printedcircuit boards or assemblies other than flexible PCBs.Note: Measling is NOT the same as blistering and/or delamination. See IPC-T-50 and IPC-A-610 for clarification.c. When areas of weave exposure reduce the clearance between noncommon conductive patterns to less than the minimum electricalclearance.d. When haloing or edge delamination reduces the edge clearance more than 50% of that specified, or more than 2.5 mm [0.0984 in],IPC/EIA J-STD-001D4th Working Draft February 200420if none is specified.