In POWER OFF state, most blocks of

In POWER OFF state, most blocks of the device are internally disconnected from the battery supply, resulting in a very low current consumption. The internal device supply voltage (VDD) stays below the Power On Reset threshold voltage and device operation is halted. Only a minimum of circuitry remains operational, like the power management and I/O ports (configured as input).The device resides in POWER OFF state any time a Power On Reset comparator output (VDDPOR) condition is applicable because of a weak supply condition. The POWER OFF state is terminated by a Wake Up event, like the presence of an LF Field (LFWUP) or a Port Wake Up (PWUP).