1. 现象描述：采用附图这种供电方式测试HYNIX 8G eMMC会F

1. 现象描述：采用附图这种供电方式测试HYNIX 8G eMMC会Fail，分析为HYNIX 8G eMMC 上电Fail。（OCR寄存器[31]位为0）。
2. 怀疑点：客户怀疑Fail的原因是：LDO5 提前LDO10 上电，时间：240us； MCU端的MMC controller 的IO漏电到8G eMMC端的MMC controller，导致HYNIX 8G eMMC 上电Fail。
3. 验证实验：如果LDO10 在LDO5 前上电，那么HYNIX 8G eMMC 测试 PASS；
如果MCU端的MMC controller 和8G eMMC端的MMC controller 电源均为LDO5，那么HYNIX 8G eMMC 测试PASS。
4. 备注：在LDO5上电之后，LDO10 上电之前，MCU不会对HYNIX 8G eMMC进行命令发送和数据读写。

有如下问题需要hynix确认
1. MCU端的MMC controller 的电源比HYNIX 8G eMMC端的MMC controller 电源提前上电，那么这样会不会影响HYNIX 8G eMMC的上电？
2. HYNIX 8G eMMC 的MMC controller 上电前对外部漏电流的要求？

0/5000

源语言: -

目标语言: -

结果 (英语) 1: [复制]

复制成功！

1. Symptom: This test uses reference power supply HYNIX 8G eMMC will Fail, Fail to power analysis HYNIX 8G eMMC. (OCR register [31] bit is 0). 2. skeptical point: Fail customers suspect the reason is: LDO5 advance LDO10 power-up, time: 240us; MMC controller MCU end of the IO leakage to the MMC controller 8G eMMC end, resulting in HYNIX 8G eMMC Power-Fail. 3. Verify test: if the electrical LDO10 LDO5 before, then the PASS Test HYNIX 8G eMMC; if MMC controller MCU and the terminal ends of the MMC controller 8G eMMC are LDO5 power, then HYNIX 8G eMMC test PASS. 4. Note: LDO5 after power on, before LDO10 power, the MCU will not HYNIX 8G eMMC transmits a command and data read and write. The following issues need to hynix confirm the power of MMC controller 1. MCU end than HYNIX 8G eMMC end of MMC controller earlier in the power, then this will not affect the power of HYNIX 8G eMMC? 2. HYNIX 8G eMMC of MMC controller before power on the requirements of the external leakage current?

正在翻译中..

结果 (英语) 2:[复制]

复制成功！

1. Description of the phenomenon: HyNIX 8G eMMC will be tested with the power supply of the drawing, analyzed as HYNIX 8G eMMC powered up Fail. (OCR register is 0 bit). 2. Suspect: The reason the customer suspects Fail is: LDO5 powered up ahead of LDO10, time: 240us; 3. Verification experiment: If LDO10 is powered on before LDO5, then HYNIX 8G eMMC test pass; If both the MMC controller on the MCU side and the MMC controller on the 8G eMMC are LDO5, then HYNIX 8G eMMC tests PASS. 4. Note: After the LDO5 is powered on, the MCU will not send commands and read and write data to HYNIX 8G eMMC until the LDO10 is powered on. There are the following questions that need hynix confirmation 1. The MMC controller on the MCU side is powered up earlier than the MMC controller power supply on the HYNIX 8G eMMC end, so will this not affect the power-up of hyNIX 8G eMMC? 2. Requirements for external leakage currents before HYNIX 8G eMMC's MMC controller is powered on?

正在翻译中..

结果 (英语) 3:[复制]

复制成功！

1. Phenomenon description: Test Hynix 8g EMMC will fail by using the power supply mode as shown in the figure, and analyze it as Hynix 8g EMMC fails to power on. (OCR register [31] bit is 0). 2. Skepticism: The reason why customers suspect Fail is that LDO5 is powered on by LDO10 ahead of time: 240us; IO leakage of MMC controller at MCU end to MMC controller at 8G eMMC end leads to failure of HYNIX 8G eMMC. 3. Verification experiment: If LDO10 is powered up before LDO5, then HYNIX 8G eMMC tests PASS; If the MMC controller of MCU and the MMC controller of 8G eMMC are LDO5, then HYNIX 8G eMMC tests PASS. Note: After LDO5 is powered on, before LDO10 is powered on, MCU will not send commands and read and write data to HYNIX 8G eMMC. The following questions need to be confirmed by Hynix 1. The power of MMC controller in MCU is earlier than that of MMC controller in HYNIX 8G eMMC. Does this affect the power of HYNIX 8G eMMC? 2. Requirements for external leakage current before the MMC controller of HYNIX 8G eMMC is turned on?

正在翻译中..

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