The way to assure that the system level throughput does not degrade as supply voltage is reduced by exploiting parallelism and pipelining. Hence as the supply voltage is reduced, the degree of parallelism or the number of stages of pipelining is increased to compensate for the increased delay. But the latency increases. Overhead control circuitry also has to be added. As such circuitry itself consumes power, there exists a point beyond which power increases, instead of decreasing, Even so, great reductions in power dissipation by factors as large as 10, have been shown to be obtainable theoretically as well as in practice.