The communication process control of DSP for network card is that DSP programs and controls various registers in DP8390 to complete the correct sending and receiving of data packets. All internal registers of DP8390 are 8 bits, which are mapped to 4 pages. Each page has 16 register addresses for reading and writing (RA=00OH ~0fH). Page selection is controlled by command register CA. Page 0 register is used for transceiving process, page 1 register is mainly used for initialization of DP8390, and page 2 register is used for loop diagnosis. The register is operated by DSP as the port device of DSP, and its actual physical port address (PPA) is the sum of the basic I/O port address (BI0A) of the network card and the register address (RA) (i.e. PPA=BI0A+RA). It should be noted that there is no one-to-one correspondence between PPA and registers, and the read operation and write operation on PPA are not the same-to-register, which is especially obvious on page 0. The interaction of data packets between DSP and NIC is realized through the data port of NIC, which can be read in by DMA or PIO or sent to RAM buffer of NIC. In this system, DSP uses DMA to read and write data to the network card. The data port address (NDPA) of the network card is the basic I/O address (BI0A) of the network card plus an offset address of 10H (that is, NDPA=BI0A+10H).
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