1. 现象描述：采用附图这种供电方式测试HYNIX 8G eMMC会F

1. Symptom: This test uses reference power supply HYNIX 8G eMMC will Fail, Fail to power analysis HYNIX 8G eMMC. (OCR register [31] bit is 0). <br>2. doubt point: Fail reason to doubt: LDO5 advance LDO10 power-up, time: 240us; MMC controller MCU end of the IO leakage to the MMC controller 8G eMMC end, leading to the HYNIX 8G eMMC electric Fail. <br>3. Verify test: if the electrical LDO10 LDO5 before, then the PASS Test HYNIX 8G eMMC; <br>if MMC controller MCU and the terminal ends of the MMC controller 8G eMMC are LDO5 power, then HYNIX 8G eMMC test PASS. <br>4. Note: LDO5 after power on, before LDO10 power, the MCU will not HYNIX 8G eMMC transmits a command and data read and write. <br><br>The following issues need to hynix confirm <br>the power of MMC controller 1. MCU end than HYNIX 8G eMMC end of MMC controller earlier in the power, then this will not affect the power of HYNIX 8G eMMC? <br>2. HYNIX 8G eMMC of MMC controller before power on the requirements of the external leakage current?

1. Description of the phenomenon: HyNIX 8G eMMC will be tested with the power supply of the drawing, analyzed as HYNIX 8G eMMC powered up Fail.<br>(OCR register is 0 bit).<br>2. Suspect: Suspect Fail reasons are: LDO5 up to LDO10, time: 240us;<br>3. Verification experiment: If LDO10 is powered on before LDO5, then HYNIX 8G eMMC test pass;<br>If both the MMC controller on the MCU side and the MMC controller on the 8G eMMC are LDO5, then HYNIX 8G eMMC tests PASS.<br><br>4. Note: After the LDO5 is powered on, the MCU will not send commands and read and write data to HYNIX 8G eMMC until the LDO10 is powered on.<br>There are the following questions that need hynix confirmation<br>1. The MMC controller on the MCU side is powered up earlier than the MMC controller power supply on the HYNIX 8G eMMC end, so will this not affect the power-up of hyNIX 8G eMMC? 2. Requirements for external leakage currents before HYNIX 8G eMMC's MMC controller is powered on?

1. Phenomenon Description: Using the power supply method of the attached figure to test the failure of HYNIX 8G eMMC, the failure is analyzed as the failure of HYNIX 8G eMMC. (OCR register [31] bit is 0).<br>2. Scepticism: The reason for suspecting Fail is: LDO5 powers on LDO10 ahead of time: 240us; IO leakage of MMC controller at MCU end to MMC controller at 8G eMMC end leads to failure of HYNIX 8G eMMC.<br>3. Verification experiment: If LDO10 is powered up before LDO5, then HYNIX 8G eMMC tests PASS;<br>If the MMC controller of MCU and the MMC controller of 8G eMMC are LDO5, then HYNIX 8G eMMC tests PASS.<br>Note: After LDO5 is powered on, before LDO10 is powered on, MCU will not send commands and read and write data to HYNIX 8G eMMC.<br>The following questions need to be confirmed by Hynix<br>1. The power of MMC controller in MCU is earlier than that of MMC controller in HYNIX 8G eMMC. Does this affect the power of HYNIX 8G eMMC?<br>2. Requirements for external leakage current before the MMC controller of HYNIX 8G eMMC is turned on?<br>