29.5.13 USART Smartcard modeThis section is relevant only when Smartcard mode is supported. Please refer toSection 29.4: USART implementation on page 887.Smartcard mode is selected by setting the SCEN bit in the USART_CR3 register. InSmartcard mode, the following bits must be kept cleared:• LINEN bit in the USART_CR2 register,• HDSEL and IREN bits in the USART_CR3 register.Moreover, the CLKEN bit may be set in order to provide a clock to the smartcard.The smartcard interface is designed to support asynchronous protocol for smartcards asdefined in the ISO 7816-3 standard. Both T=0 (character mode) and T=1 (block mode) aresupported.The USART should be configured as:• 8 bits plus parity: where word length is set to 8 bits and PCE=1 in the USART_CR1register• 1.5 stop bits: where STOP=11 in the USART_CR2 register. It is also possible to choose0.5 stop bit for receiving.In T=0 (character) mode, the parity error is indicated at the end of each character during theguard time period.Figure 338 shows examples of what can be seen on the data line with and without parityerror.