D13 is the SLEEP bit. When this bit equals 1, the AD9832 is powered down, internal clocks are disabled, and the current sources and REFOUT of the DAC are turned off. When SLEEP = 0, the AD9832 is powered up. When RESET (D12) = 1, the phase accumulator is set to zero phase that corresponds to a full-scale output. When CLR (D11) = 1, SYNC and SELSRC are set to zero. CLR resets to 0 automatically.