One way of influencing the delay of a CMOS circuit is to change the channel-width to channel-length ratio of the devices in the circuit. The power-delay product for an inverter driving another inverter through an interconnect of certain length varies with the width to length ratio of the devices. If the interconnect capacitance is insignificant, the power-delay product initially decreases and then increases when the width-to-length ratio is increased and the supply voltage is reduced to keep the delay constant. Hence, there exists a the supply voltage and the width-to-length ratio that is optimal from the power-delay product consideration.