该设计是一个简单的基于零中频正交解调为基本原理的频率特性测试仪,用于测量被测网络的幅频特性和相频特性。该设计主要包括DDS集成模块,由RLC的英语翻译

该设计是一个简单的基于零中频正交解调为基本原理的频率特性测试仪,用于测

该设计是一个简单的基于零中频正交解调为基本原理的频率特性测试仪,用于测量被测网络的幅频特性和相频特性。该设计主要包括DDS集成模块,由RLC串联谐振电路,乘法器电路,低通滤波器,同相放大器和最终显示模块组成的被测网络。 RLC串联谐振电路用作被测网络。设计的系统基于DDS模块。产生正交信号并通过被测网络后,该乘法器可以获得高频信号。经过低通滤波和同相放大后,这两个信号便可以满足要求。 I,Q两个直流分量;最后通过STM32单片机对ADC进行采样,数据处理和液晶显示,以获得被测网络的幅频特性和相频特性。该设计的算法创新在于,在测量开始时,使被测网络短路的方法(即内部测试校准)可减少系统误差。经过最终测试后,该设计可以很好地完成被测网络的频率特性测试。
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源语言: -
目标语言: -
结果 (英语) 1: [复制]
复制成功!
The design is a simple frequency characteristic tester based on the zero-IF quadrature demodulation as the basic principle, used to measure the amplitude-frequency characteristics and phase-frequency characteristics of the network under test. The design mainly includes a DDS integrated module, a network under test composed of an RLC series resonance circuit, a multiplier circuit, a low-pass filter, a non-inverting amplifier, and a final display module. The RLC series resonant circuit is used as the network under test. The designed system is based on the DDS module. After generating quadrature signals and passing through the network under test, the multiplier can obtain high-frequency signals. After low-pass filtering and in-phase amplification, these two signals can meet the requirements. Two DC components, I and Q; finally, the ADC is sampled by the STM32 microcontroller, data processing and liquid crystal display to obtain the amplitude-frequency characteristics and phase-frequency characteristics of the tested network. The algorithm innovation of the design is that, at the beginning of the measurement, the method of short-circuiting the network under test (ie, internal test calibration) can reduce system errors. After the final test, the design can well complete the frequency characteristic test of the network under test.
正在翻译中..
结果 (英语) 2:[复制]
复制成功!
The design is a simple frequency characteristic tester based on zero-IF orthogonal solution as the basic principle, which is used to measure the amplitude and phase characteristics of the network under measure. The design mainly includes the DDS integrated module, which consists of the RLC series resonant circuit, the multiplier circuit, the low-pass filter, the phase amplifier and the final display module. The RLC series resonant circuit is used as the network under test. The system is designed based on the DDS module. After the orthogonal signal is generated and passed through the network under test, the multiplier can obtain a high-frequency signal. These two signals can meet the requirements after low-pass filtering and phase amplification. I, Q two DC components, and finally through the STM32 microcontroller to sample, data processing and liquid crystal display, in order to obtain the frequency and phase characteristics of the network under test. The algorithmic innovation of the design is that the method of short-circuiting the network under test (i.e., internal test calibration) reduces system error stoical errors at the beginning of the measurement. After the final test, the design can complete the frequency characteristics of the network under test. ...
正在翻译中..
结果 (英语) 3:[复制]
复制成功!
This design is a simple frequency characteristic tester based on the principle of zero if quadrature demodulation, which is used to measure the amplitude frequency characteristic and phase frequency characteristic of the tested network. The design includes DDS integrated module, RLC series resonant circuit, multiplier circuit, low-pass filter, in-phase amplifier and final display module. RLC series resonant circuit is used as the network under test. The system is based on DDS module. After the orthogonal signal is generated and passed through the tested network, the multiplier can obtain the high frequency signal. After low-pass filtering and in-phase amplification, the two signals can meet the requirements. 1. Q two DC components; finally, the ADC is sampled by STM32 single chip microcomputer, data processing and liquid crystal display to obtain the amplitude frequency characteristics and phase frequency characteristics of the tested network. The algorithm innovation of this design is that at the beginning of measurement, the method of making the tested network short-circuit (i.e. internal test calibration) can reduce the system error. After the final test, the design can well complete the frequency characteristic test of the tested network.<br>
正在翻译中..
 
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