Owing to advanced technologies, the

Owing to advanced technologies, the total power density in a high-performance computing system is expected to increase beyond 100 W/cm2; power delivery becomes a critical challenge, and advanced cooling solutions are turning into a necessity. Moreover, reduced noise margin determined by the scaling trend of the technology is making power delivery to the chip ever more challenging. Placing dice side-by-side poses thermal coupling issues where heat flows from the high-power die to the low-power die. There are also inter-dependencies among these different domains. Therefore, in this research effort, we investigate and benchmark different 2.5-D and 3-D heterogeneous integration technologies on the thermal and electrical performance and their inter-dependencies. We develop a thermally aware power delivery network (PDN) design framework to investigate power supply noise for emerging 2.5-D and 3-D integration technologies. We also present a novel backside-PDN configuration where the PDN is separated from the signaling network of the die. The research tasks will feed into one another in order to develop more comprehensive pre-design analysis of heterogeneous integration systems.