Equations (6) and (7) are valid also in case both comparators have different comparation levels, Vc1 and Vc2, respectively, which must be used instead of Vc. The worst case is, if one input voltage has minimum and the second one maximum level.The errors in the logic circuits and the AND gates can be again overcome by the proper selection of the components (short response time, short rise time and fall time). The clock frequency must be high enough to get the desired measurement resolution.There are, of course, errors inherent to all digital methods of time interval measurement. In every measurement of the time interval t1 the error of ±1 pulse can occur. In the most critical case, when the error of +1 pulse (or -1 pulse) in every measurement of the time interval t1 is observed, the maximum relative error of measurement will be
Equations (6) and (7) are valid also in case both comparators have different comparation levels, Vc1 and Vc2, respectively, which must be used instead of Vc. The worst case is, if one input voltage has minimum and the second one maximum level.<br>The errors in the logic circuits and the AND gates can be again overcome by the proper selection of the components (short response time, short rise time and fall time). The clock frequency must be high enough to get the desired measurement resolution.<br>There are, of course, errors inherent to all digital methods of time interval measurement. In every measurement of the time interval t1 the error of ±1 pulse can occur. In the most critical case, when the error of +1 pulse (or -1 pulse) in every measurement of the time interval t1 is observed, the maximum relative error of measurement will be
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