When the simplified system, as shown in the bq769x0 data sheet, is shut down, the FETs are off and thePACK terminals are expected to show 0 V. In most systems, the power FETs will have some smallleakage current. Additionally, the CHG pin provides some pulldown through the drive circuit and gate tothe source resistor to give a pack voltage near the battery voltage. However the charger cannot providecharge current and an external signal for the charger to wake the monitor IC may be desired. Thereference back to VSS for providing a ground for the external signal is high impedance. A circuit which willreference the TS1 signal from a voltage inside the battery may be desirable.The circuit in Figure 2 provides the boot voltage from the pack voltage reference using an external signalfrom the charger. When the BOOT terminal is pulled high to PACK+ the TS1 pin of the monitor IC isprovided with a voltage from the battery positive, limited by D1. This adds a load to the cells whenever thepullup is applied and applies a voltage to the TS1 pin. D2 prevents charge of the battery from a voltageapplied between PACK+ and BOOT. D3 may be desired to prevent D1 from limiting the temperature rangeof the thermistor R1.