Device Functional Modes7.4.1 Feed-Forward Voltage ModeAn external resistor (RFF) and capacitor (CFF) connected to VIN, AGND, and the RAMP pins is required to create the PWM ramp signal as shown in Figure 14. It can be seen that the slope of the signal at RAMP will vary in proportion to the input line voltage. This varying slope provides line feed-forward information necessary to improve line transient response with voltage mode control. The RAMP signal is compared to the error signal by the pulse width modulator comparator to control the duty cycle of the outputs. With a constant error signal, the on-time (tON) varies inversely with the input voltage (VIN) to stabilize the Volt • Second product of the transformer primary. At the end of clock period, an internal FET will be enabled to reset the CFF capacitor. The formulae for RFF and CFF and component selection criteria are explained in the Application and Implementation section. The amplitude of the signal driving RAMP pin must not exceed the common mode input voltage range of the PWM comparator (3.3 V) while in normal operation.