ABSTRACT An integrated circuit chip is provided, which includes an active circuit area, a seal ring structure, and a first dummy structure. The seal ring structure is formed at least partiall around the active circuit area. The first dummy structure extends from the seal ring structure into the active circuit area. Other dummy structures that are not directly joined to the seal ring structure at a given level may be provided also to further fill in spaces between active wiring. A software algorithm included in a layout tool may allow for automati cally laying out such structures in accordance with prede termined layout design rules.