The ALERT pin serves as an active h

The ALERT pin serves as an active high digital interrupt signal that can be connected to a GPIO port ofthe host microcontroller. This signal is an OR of all bits in the SYS_STAT register.In order to clear the ALERT signal, the source bit in the SYS_STAT register must first be cleared bywriting a “1” to that bit. This will cause an automatic clear of the ALERT pin once all bits are cleared.The ALERT pin may also be driven by an external source; for example, the pack may include a secondaryovervoltage protector IC. When the ALERT pin is forced high externally while low, the device willrecognize this as an OVRD_ALERT fault and set the [OVRD_ALERT] bit. This triggers automatic disablingof both CHG and DSG FET drivers. The device cannot recognize the ALERT signal input high when it isalready forcing the ALERT signal high from another condition.