The receiver holding register (RHR) is selected with the register bit setting of LCR[7] = 0. The receiversection consists of the receiver holding register and the receiver shift register. The RHR is actually a 64-byte FIFO. The receiver shift register receives serial data from RX input. The data is converted to paralleldata and moved to the RHR. If the FIFO is disabled, location zero of the FIFO is used to store the singledata character. If an overflow occurs, the data in the RHR is not overwritten